Error correction code (ECC) memory is a type of computer data storage that can detect and correct most conventional types of internal data corruption. ECC memory circuits may be used in computers where data corruption cannot generally be tolerated, such as for scientific or for automotive memories for safety critical Advanced Driver Assistance Systems (ADAS) which need to comply with functional safety requirements.
Implementing ECC on memories (e.g., static random access memory (SRAM), read only memory (ROM), or flash memory) is a standard safety mechanism used in safety critical applications to ensure data integrity within the memories. Conventionally, ECC redundant bits (e.g., in a Hamming code) are added to the memory data contents by write path ECC logic circuitry and written together in the same cycle to the memory in order to provide checking of the data stored in the memory when the memory is read out by read path ECC logic circuitry. The ECC as used herein is for single bit error correction for single bit errors and a multi-bit error detection for multi-bit errors (e.g., double bit errors), generally using redundant bits in a Hamming code.
Conventionally generate ECC hardware units are provided in the write path and in the read path, with a generate ECC unit in the write path and a check ECC block including another generate ECC unit in the read path. The write path circuitry and read path circuitry have no cross coupling connections and thus operate independently from one another. During a memory read operation, the ECC is re-recomputed by the check ECC block which is compared with the stored ECC by an XOR circuit. The result (output) of this XOR circuit is called the syndrome. If the syndrome is zero, no error has occurred. If the syndrome is non-zero, it can be used to index a table to a “Syndrome decode” to determine which bits are in error in case of a single bit error correction (SEC), or that the error is uncorrectable in case of a double bit error detection (DED). Accordingly, conventional ECC memory can generally maintain a memory system effectively free from most bit errors.